Infineon Technologies on 4 November 2026 announced AURIX RC1, a new microcontroller (MCU) platform it describes as its first automotive product built on the open RISC‑V instruction set. The company said the family is intended to span zone, body, chassis, battery‑management, powertrain and cockpit functions, and that it will be shown at the electronica trade fair in Munich on 10–13 November 2026.

The technology and timeline

Infineon said AURIX RC1 will scale from traditional MCU tasks toward hybrid MCU/MPU use-cases. The firm published family targets including up to twelve 32‑bit processing cores, an “advanced parallel processing unit” for edge AI and up to 40 MB of embedded memory in higher‑end devices. The platform is designed to support the highest automotive functional safety level (ASIL D) and to include networking support such as CAN‑XL, 10BASE‑T1S and multi‑Gigabit Ethernet on selected devices. Samples are targeted for the first half of 2027.

To ease adoption, Infineon said AURIX RC1 will be supported by a DRIVECORE software ecosystem that bundles AUTOSAR and open‑source components, virtual prototyping and AI‑assisted migration tools to help customers port software from legacy AURIX and TRAVEO families. The announcement names industry collaboration, RISC‑V tooling and a pre‑integrated software stack as pillars of the offering.

What this means for the market

Infineon positions AURIX RC1 as a platform-level move toward software‑defined vehicles (SDV) and “Physical AI” — edge intelligence embedded in hardware that must meet real‑time, safety and cybersecurity constraints. Peter Schiefer, President of Infineon’s Automotive Division, said: “Microcontrollers need to become more configurable, scalable, and adaptable while maintaining highest safety and security levels as applications evolve. AURIX RC1 combines the flexibility of the open standard RISC‑V with decades of Infineon expertise in providing dependable execution of safety‑critical tasks in real‑time.”

For carmakers and suppliers in Central and Eastern Europe the announcement is material for three reasons. First, a common RISC‑V MCU family reduces the number of distinct controllers needed across zonal and domain architectures, which can simplify supplier sourcing and E/E design cycles for OEMs with production in the CEE region. Second, edge AI and expanded networking on an MCU level make it easier to shift some ADAS, battery management and body‑control functions away from bespoke ECUs toward standardized zone controllers—affecting supplier bill‑of‑materials and software integration efforts across CEE supplier chains. Third, the DRIVECORE tooling and virtual prototyping claims—if delivered—could shorten migration timelines for tier‑1s and local engineering centres that support European OEMs. These are company claims and timelines taken from the Infineon announcement; market uptake will depend on samples, qualification and supply schedules.

Infineon’s move also strengthens the RISC‑V presence in automotive compute, an important factor for European semiconductor strategy and for OEMs seeking supply diversity and software portability. The RC1 family concept — and the company’s stated aim to provide samples in H1 2027 — sets a development milestone OEMs and tier‑1s will watch closely as they plan software‑defined architectures.

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Sources: Infineon Technologies, SDV Sector, MarkLines